publications

Publications by categories in reversed chronological order.

2023

  1. Conference
    Cool-CIM: Cryogenic Operation of Analog Compute-In-Memory for Improved Power-Efficiency
    Wei-Chun Wang, Rakshith Saligram, Sudarshan Sharma, Minah Lee, Amol Gaidhane, and 4 more authors
    In IEEE International Electron Devices Meeting (IEDM) Dec 2023
  2. Conference
    Cryogenic CMOS as an Enabler for Low Power Dynamic Logic
    Rakshith Saligram, Suman Datta, and Arijit Raychowdhury
    In ACM/IEEE Symposium on Low Power Electronics and Design (ISLPED) Aug 2023

2022

  1. Conference
    Dual Temperature Memory Hierarchy and High Speed High Density Data Links for Superconducting Digital Systems
    Anna Herr, Rakshith Saligram, Steven Van Winckel, Joseph Glass, Manu Perumkunnil, and 4 more authors
    In Applied Superconductivity Conference (ASC) Oct 2022
  2. Journal
    Design Space Exploration of Interconnect Materials for Cryogenic Operation : Electrical and Thermal Analyses
    Rakshith Saligram, Suman Datta, and Arijit Raychowdhury
    IEEE Transactions on Ciruits and Systems I : Regular Papers Oct 2022

2021

  1. Conference
    Multi-bit-per-cell 1T SiGe Floating body RAM for Cache Memory in Cryogenic Computing
    Wriddhi Chakraborty, Pragya Shrestha, Ankit Gupta, Rakshith Saligram, Sam Spetalnick, and 3 more authors
    In IEEE Symposium on VLSI Technology and Circuits Jul 2021
  2. Conference
    Pseudo Static 1T Capacitorless DRAM using 22nm FDSOI for Cryogenic Cache Memory
    Wriddhi Chakraborty, Rakshith Saligram, Aniket Gupta, Matthew San Jose, Khandker Akif Aabrar, and 4 more authors
    In IEEE International Electron Devices Meeting (IEDM) Dec 2021
  3. Journal
    Characterization and Modeling of 22nm FDSOI Cryogenic RF CMOS
    Wriddhi Chakraborty, Khandker Akif Aabrar, Jorge Gomez, Rakshith Saligram, Arijit Raychowdhury, and 2 more authors
    IEEE Journal of Exploratory Solid-State Computational Devices and Circuits Dec 2021
  4. Journal
    Performance Analysis of Digital Standard Cells for 28nm Bulk CMOS at Cryogenic Temperature using BSIM models
    Rakshith Saligram, Ningyuan Cao, Wriddhi Chakraborty, Yu Cao, Suman Datta, and 1 more author
    IEEE Journal of Exploratory Solid-State Computational Devices and Circuits Dec 2021
  5. Conference
    Cryogenic RF CMOS on 22nm FDSOI Platform with Record fT=495GHz and fMAX=497GHz
    Wriddhi Chakraborty, Khandker Akif Aabrar, Jorge Gomez, Rakshith Saligram, Arijit Raychowdhury, and 1 more author
    In IEEE VLSI Technology Symposium Jul 2021
  6. Journal
    CryoMem: A 4K-300K 1.3GHz Hybrid 2T-Gain-Cell based eDRAM Macro in 28nm Logic Process for Cryogenic Applications
    Rakshith Saligram, Suman Datta, and Arijit Raychowdhury
    IEEE Solid State Circuit Letters Jul 2021
  7. Journal
    Scaled Back-End Of Line Interconnects at Cryogenic Temperatures
    Rakshith Saligram, Suman Datta, and Arijit Raychowdhury
    IEEE Electron Device Letters Jul 2021
  8. Conference
    CryoMem: A 4K-300K 1.3GHz eDRAM Macro with Hybrid 2T-Gain-Cell in a 28nm Logic Process for Cryogenic Applications
    Rakshith Saligram, Suman Datta, and Arijit Raychowdhury
    In IEEE Custom Integrated Circuits Conference (CICC) Apr 2021
  9. Conference
    A 64-Bit Arm CPU at Cryogenic temperatures: Design Technology Co-Optimization for Power and Performance
    Rakshith Saligram, Divya Prasad, David Pietromonaco, Arijit Raychowdhury, and Brian Cline
    In IEEE Custom Integrated Circuits Conference (CICC) Apr 2021
  10. Book Chapter
    Multilevel Signalling for High-Speed Chiplet-to-Chiplet Communication
    Rakshith Saligram, Ankit Kaul, Muhannad S Bakir, and Arijit Raychowdhury
    In VLSI-SoC New Technology Enabler, Springer Apr 2021

2020

  1. Conference
    A Model Study of Multilevel Signalling for High-Speed Chiplet-to-Chiplet Communication in 2.5D Integration
    Rakshith Saligram, Ankit Kaul, Muhannad Bakir, and Arijit Raychowdhury
    In Proceedings of 28th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2020) Oct 2020

2018

  1. Conference
    Realization of Multivalued Logic Combinational Circuits in Fully Depleted Silicon on Insulator
    Rakshith Saligram, P Abhilash, and K S Vasundara Patel
    In Proceedings of IEEE International Conference on Networking, Embedded and Wireless Systems Dec 2018
  2. Conference
    Quarternary Digital Circuits design using Carbon Nanotube FETs
    Rakshith Saligram, KN Naga Jyoti, and K S Vasundara Patel
    In Proceedings of IEEE International Conference on Networking, Embedded and Wireless Systems Dec 2018

2016

  1. Conference
    Towards mitigating the impact of NBTI and PBTI Degradation
    Bhuvana Bairy, T. Soren Craig, Kalyani Gonde, Naman Gupta, Andrew Prajogi, and 2 more authors
    In Proceedings of 2nd World Congress on Automation and Robotics Conference Jun 2016
  2. Journal
    Mitigating the impact of NBTI and PBTI Degradation
    Bhuvana Bairy, T. Soren Craig, Kalyani Gonde, Naman Gupta, Andrew Prajogi, and 2 more authors
    Global Journal of Technology and Optimization Jun 2016
  3. Book Chapter
    Concluding Remarks
    Zhaoqi Chen, Kalyani Gonde, Kodiak Ravicz, Rakshith Saligram, Mike Schlesinger, and 1 more author
    In Wireless Computing in Medicine: From Nano to Cloud with Ethical and Legal Implications, Wiley Jun 2016

2013

  1. Conference
    Design and Implementation of Logical Cost Efficient Nanometric Fault Tolerant Reversible BCD Adder
    Rakshith Saligram
    In Proceedings of IEEE 10th INDICON Dec 2013
  2. Conference
    Design of Low Logical Cost Conservative Reversible Adders using Novel PCTG
    Rakshith Saligram
    In Proceedings of IEEE 4th International Symposium on Electronic System Design Dec 2013
  3. Conference
    Design of Low Logical Cost Adders using Novel Parity Conserving Toffoli Gate
    Rakshith Saligram, and Rakshith Ravishankar
    In Proceedings of IEEE International Conference on Emerging Trends in Communication, Control, Signal Processing and Computing Applications Oct 2013
  4. Conference
    Towards the Design of Fault Tolerant Reversible Circuits Components of ALU using New PCMF Gate
    Rakshith Saligram, and Rakshith Ravishankar
    In Proceedings of IEEE International Conference on Advances in Computing, Communication and Informatics Oct 2013
  5. Journal
    Design of Parity Preserving Logic Based Fault Tolerant Reversible Arithmetic Logic Unit
    Rakshith Saligram, Shrihari Hegde, Shashidhar Kulkarni, HR Bhagyalakshmi, and MK Venkatesha
    International Journal of VLSI Design and Communication Systems Jun 2013
  6. Conference
    Optimized Reversible Vedic Multipliers for High Speed Low Power Operations
    Rakshith Saligram, and Rakshith Ravishankar
    In Proceedings of IEEE International Conference on Information and Communication Technologies Jun 2013
  7. Conference
    Contemplation of synchronous Gray Code counter and its variants using reversible logic gates
    Rakshith Saligram, and Rakshith Ravishankar
    In Proceedings of IEEE International Conference on Information and Communication Technologies Jun 2013
  8. Conference
    Parity preserving logic based fault tolerant reversible ALU
    Rakshith Ravishankar, and Rakshith Saligram
    In Proceedings of IEEE International Conference on Information and Communication Technologies Jun 2013
  9. Conference
    Design of High Speed Low Power Multiplier using Reversible logic: a Vedic Mathematical Approach
    Rakshith Ravishankar, and Rakshith Saligram
    In Proceedings of IEEE International Conference on Circuits Power and Computing Technologies Mar 2013
  10. Journal
    Design of Fault Tolerant Reversible Multiplexer Based Multi-Boolean Function Generator using Parity Preserving Gates
    Rakshith Saligram, Shrihari S Hegde, Shashidhar A Kulkarni, H R Bhagyalakshmi, and MK Venkatesha
    International Journal of Computer Applications Mar 2013

2012

  1. Journal
    Design of Reversible Multipliers for Linear Filtering Applications in DSP
    Rakshith Saligram, and Rakshith Ravishankar
    International Journal of VLSI Design and Communication Systems Dec 2012
  2. Journal
    Novel Code Converter Employing Reversible Lgic
    Rakshith Saligram, and Rakshith Ravishankar
    International Journal of Computer Applications Jun 2012