IMEC USA May 2022-Dec 2022
Research Intern Worked on high speed comparators and pre-amplifiers for superconductor-CMOS interface circuits at 77K to bridge the voltage difference between Jospehson-Junction SRAM at 4K and conventional HBM DRAM at 300K and performed noise modelling for cryogenic channels including study of suitable bit modulation schemes
Arm Inc May 2020-Aug 2020
Research Intern Worked on benchmarking of Arm Cores at Cryogenic Temperatures, Characterization of BEOL Stack using open source models at Low Temperatures, Recharacterization of Standard Cells at multiple temperature and Vdd Points, Thermal and Self Heating Analysis
Intel Corp Jun 2016-Dec 2018
Graphics Hardware Engineer DSSM Responsible for synthesis, placement, CTS and routing for various generations of Intel’s GFxProcessors STA and timing closure of multiple partitions across various projects in GT to validate the physical design for performance, reliability, DRC/LVS, Noise and other quality aspects that improve post silicon stability of ICs Drive section timing performance convergence by integrating partition netlists to do top-level netlist roll-up Report and debug physical design quality issues to meet pre-tape-in criteria. Initiate section level Prime Time ECO to converge on timing and design quality rules Repeater planning for Intra section and Inter section communication bundles based on same spine and cross spine for SDR and DDR specifications. Addition of manual repeaters based on distance specifications Repeater bound generation and validation for slice level floor plan by rolling up ICC2 physical data bases
Integrated Circuits and Systems Research Lab Jan 2019-Present
Graduate Research Assistant Currently working on Cryogenic CMOS VLSI Circuits, including but not limited to TCAD Modelling, HSPICE Simulations, Tape-Out of FOM Circuits to quantify performance improvements. Checkout the Chip Gallery
Dept. of Electrical Engineering USC Aug 2015-Dec 2015
Course Development Assistant Assist the Department Chair of EE Systems to develop and improve EE477L (MOS VLSI Circuit Design) course curriculum.
Dept. of Electrical Engineering USC May 2015-Aug 2015
Course Grader Modern Solid State Devices Provide solutions and grade the assignments for EE537- Modern Solid-State Devices course and hold office hours for discussion.
Dept. of ECE BMS College of Engineering Jul 2013-Jun 2014
Lecturer Instructed freshmen, sophomore & junior classes and senior lab. Visit the teaching page for details about the classes. Functioned as one of the department coordinators for National Board of Accreditation (NBA)