cryogenic circuits & HPC

Average Standard cell delay of recharaterized libraries in 14nm compared with 7nm, Performance improvement at nominal VDD, performance/watt vs performance for cyrogenic 64 bit Arm Cortex A-53.

Heat Maps at room and cryogenic temperature showing 4x lower rise in temperature at 100K for Arm Server Core implemented in 7nm running maximum power workload.

Effect of Body Bias on drive current and SS at 77K, Selective body bias for evaluation network and energy-delay tradeoffs at 77K for FOM circuits.