2T Gain cell memory with retention failure probability across temperature, power vs bandwidth and read-write energy with refresh power across temperature.
Operating principle of floating body RAM and hold time across temperature showing increased current margins at cryogenic temperature leading to pseudo-static behavior.
Layout of 1 transisor SiGe Floating body RAM and capability of multi-bits per cell.
4T SRAM operating principle and Monolithic 3D TCAD implementation shown with benchmarking of MIV density.