Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing accepted in Symposium of VLSI Technology and Circuits


Cryogenic computing requires high-density on-die cache memory with low latency, high bandwidth and energy-efficient access to increase cache hit and maximize processor performance. Here, we experimentally demonstrate, high-speed multi-bit memory operation in 1T SiGe Floating-body RAM (FBRAM) using 22nm FDSOI transistor at 77K, for cryogenic cache memory application. The 1T SiGe FBRAM cell (W/L G =170nm/20nm) at 77K exhibits : (a) record write time of <5ns with write voltage (V Write ) 1.5V; (b) high sense current (I Read,1 ~75μA) with read margin (ΔI Read =I Read,1 -I Read,0 ) ~14 μA; (c) 2-bit/cell operation; (d) pseudo-static retention (~8x10 3 s) for single-bit and worst case retention of 100 s for 2-bit per cell, and (e) high write endurance >10 12 . Array-level benchmarking shows that compared to 6T SRAM, 1T SiGe FBRAM shows 8.3x higher memory density with 2.3x/1.8x gain in read/write energy, 3.3x/1.7x in read/write latency and 4.6x in energy-delay product (EDP) for a cache size of 16MB at 77K. Considering the cooling energy cost, FBRAM exhibit 60% EDP reduction compared to 300K 6T SRAM. Hence, SiGe FBRAM is a promising option for L2/L3 cache in high-performance cryo-computing. ***